Astera labs launches leo x smart memory controller to offload kv cache to external memory

On September 15, 2026, Astera Labs, a startup specializing in high-speed chip interconnects, announced the release of its Leo X, Leo 2 E, and Leo 2 P series to expand its smart memory controller product line. The Leo 2 E and Leo 2 P are compliant with the CXL 3.2 standard, supporting four downstream DDR4/DDR5 memory controllers. The Leo 2 E offers a PCIe Gen6 1×16 single-port configuration, while the Leo 2 P adds a 2×8 dual-port setup, enabling memory pooling and sharing. Meanwhile, the Leo X series is a network-based smart memory controller designed to directly meet the memory needs of AI accelerators. Astera Labs stated that the Leo X series provides a lower-latency, higher-bandwidth path for GPU access to KV Cache, reducing first-token latency by up to 62% and increasing token throughput by up to 22%. The Leo X series can be paired with Astera Labs' Scorpio network switch chip, enabling GPU scaling through PCIe and platform-specific protocols, offering a dedicated memory layer to offload KV Cache and agent contexts. This advancement aims to enhance the performance of AI workloads by optimizing memory access patterns and reducing bottlenecks in data transfer.